DESIGN AND CONSTRUCTION OF DIGITAL ELECTRONICS TRAINING SYSTEM

.5in;line-height:normal">ABSTRACT

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">Digital electronics is now used in all fields of electronics from computers to digital phones and most industrial machines and motor vehicles. When prototyping digital electronic circuits, specific digital input signals are required to design the digital circuit. To accomplish this task, a teaching device known as a “Digital Trainer” is utilized. The

purpose of this project work is to provide a method for students to test digital circuits, with a simple and inexpensive digital trainer. This project work describes design, development and application of a digital trainer circuit prototyping system for students in their digital electronics course. The primary objective is to design an inexpensive, simple to use device that could be retained by students, so that they can undertake digital experimentation. The digital trainer board which contains power supply section, logic gate section, function generator section and encoder/decoder section.It mainly concerns with logic gate section. Logic gate section is aimed to perform basic Boolean functions, such as AND, OR, NOT, NOR, NAND and so on. All logic gate circuits are firstly simulated in MULTISIM simulation environment and then constructed. After construction several tests have been performed and satisfactory results were obtained.

justify;line-height:normal">TABLE OF CONTENT

justify;line-height:normal">CHAPTER ONE

justify;line-height:normal">INTRODUCTION……………………………………………………………1

justify;line-height:normal">1.1 BACKGROUND OF STUDY………………………………………1

justify;line-height:normal">1.2 AIMS AND OBJECTIVES…………………………………………4

justify;line-height:normal">1.2.1 AIM……………………………………………………………………4

justify;line-height:normal">1.2.2 OBJECTIVES……………………………………………………… 4

justify;line-height:normal">1.3 SCOPE OF THE PROJECT……………………………………… 4

justify;line-height:normal">1.4 MOTIVATION OF THE PROJECT………………………………....5

justify;line-height:normal">CHAPTER TWO

justify;line-height:normal">2.0 LITERATURE REVIEW………………………………………………6

justify;line-height:normal">2.1 DIGITAL ELECTRONICS CIRCUITS…………………………………… 10

.0001pt;text-align:justify;line-height:normal;mso-outline-level:2">2.1.1 PROPERTIES DIGITAL ELECTRONICS CIRCUITS……………… 10

.0001pt;text-align:justify;line-height:normal">2.1.2 CONSTRUCTION DIGITAL ELECTRONICS CIRCUITS………………. 13

.0001pt;text-align:justify;line-height:normal">CHAPTER THREE

.0001pt;text-align:justify;line-height:normal">3.0 DESIGN METHODOLOGY…………………………………………………… 14

margin-left:0in;margin-bottom:.0001pt;text-align:justify;line-height:normal;

tab-stops:center 3.25in">3.1 MATERIALS AND METHOD…………………………………………………15

margin-left:0in;margin-bottom:.0001pt;text-align:justify;line-height:normal;

tab-stops:center 3.25in">3.1.1 LEDS………………………………………………………………………………16

justify;line-height:normal">3.1.2 RESISTORS…………………………………………………………………….... 16

justify;line-height:normal">3.1.3 PIN CONNECTORS…………………………………………………………….. 16

justify;line-height:normal">3.1.4 PRINTED-CIRCUIT-BOARD (PCB)……………………………………......16

justify;line-height:normal">3.1.5 SEVEN SEGMENT DSPLAY……………………………………...…………… 17

justify;line-height:normal">3.1.6 TOGGLE SWITCHES…………………………………………………………… 17

justify;line-height:normal">3.1.7 DIGITAL MULTI-METER……………………………………………………… 17

justify;line-height:normal">3.2 POWER SUPPLY UNIT…………………………………………………………. 18

.75pt">3.3 POWER RECTIFICATION COMPONENT……………………………. 18

.75pt">3.3.1 TRANSFORMER……………………………………………………………18

justify;line-height:normal">3.3.2 CAPACITOR…………………………………………………………..……19

justify;line-height:normal;tab-stops:373.5pt">3.3.3 VOLTAGE REGULATOR………………………………………...…………….19

justify;line-height:normal">3.3.4 DIODES………………………………………………………………..…………... 19

justify;line-height:normal">3.4 METHOD USED FOR THE PROJECT………………………..……………….20

justify;line-height:normal">CHAPTER FOUR

justify;line-height:normal">4.0 CONSTRUCTION, TESTING AND RESULTS………………………………21

justify;line-height:normal">4.1 HARDWARE DESIGN…………………………………………………………. 21

justify;line-height:normal">4.1.1 AND GATE SECTION…………………………………………………………... 21

justify;line-height:normal">4.1.2 NAND Gate Section……………………………………………………………….21

4.1.3 OR Gate Section…………………………………………………………………... 22

4.1.4 NOR Gate Section…………………………………………………………...…….. 23

4.1.5 NOT Gate Section…………………………………………………………………. 23

4.2 RESULTS OF SIMULATION FOR THE LOGIC GATE ICs………………… 24

4.3 TEST AND RESULTS OF DEVELOPED TRAINER BOARD……………… 28

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">4.3.1 2 INPUT OR GATE………………………………………………………………..28

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">4.3.2 NOT GATE 28

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">4.3.3 2 INPUT NAND GATE…………………………………………………………… 29

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">4.3.4 2 INPUT AND GATE 29

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">4.3.5 2 INPUT NOR GATE……………………………………………………………..30

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">4.3.6 2 INPUT XOR GATE……………………………………………………………..30

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">4.3.7 3 INPUT NAND GATE…………………………………………………………...31

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">4.3.8 3 INPUT NOR GATE……………………………………………………………..32

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">4.3.9 3 INPUT OR GATE……………………………………………………………….33

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">4.3.10 3 INPUT AND GATE……………………………………………………………..34

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">4.3.11 3 INPUT XOR GATE……………………………………………………………..35

justify;line-height:normal;mso-layout-grid-align:none;text-autospace:none">4.4 Finished assembly of digital trainer circuit demonstration kit………………… 36

CHAPTER FIVE

5.0 CONCLUSION, SUMMARY AND RECOMMANDATION………………….. 36

5.1 SUMMARY………………………………………………………………………... 36

5.2 CONCLUSION……………………………………………………………………. 36

5.3 RECOMMANDATION…………………………………………………………... 36

REFERENCES…………………………………………………………………………….37

Report Access / View File

Overall Rating

0

5 Star

(0)

4 Star

(0)

3 Star

(0)

2 Star

(0)

1 Star

(0)

APA

VoFDGyX5c0009a26219d7.61465392, O. (2018). DESIGN AND CONSTRUCTION OF DIGITAL ELECTRONICS TRAINING SYSTEM. Afribary. Retrieved from https://beta.afribary.com/works/design-and-construction-of-digital-electronics-training-system-8066

MLA 8th

VoFDGyX5c0009a26219d7.61465392, O7cqza25c0009a2606360.46366055 "DESIGN AND CONSTRUCTION OF DIGITAL ELECTRONICS TRAINING SYSTEM" Afribary. Afribary, 29 Jan. 2018, https://beta.afribary.com/works/design-and-construction-of-digital-electronics-training-system-8066. Accessed 24 Apr. 2025.

MLA7

VoFDGyX5c0009a26219d7.61465392, O7cqza25c0009a2606360.46366055 . "DESIGN AND CONSTRUCTION OF DIGITAL ELECTRONICS TRAINING SYSTEM". Afribary, Afribary, 29 Jan. 2018. Web. 24 Apr. 2025. < https://beta.afribary.com/works/design-and-construction-of-digital-electronics-training-system-8066 >.

Chicago

VoFDGyX5c0009a26219d7.61465392, O7cqza25c0009a2606360.46366055 . "DESIGN AND CONSTRUCTION OF DIGITAL ELECTRONICS TRAINING SYSTEM" Afribary (2018). Accessed April 24, 2025. https://beta.afribary.com/works/design-and-construction-of-digital-electronics-training-system-8066

DESIGN AND CONSTRUCTION OF DIGITAL ELECTRONICS TRAINING SYSTEM

0

Document Details

Related Works